jeffr_tech (![[info]](http://l-stat.livejournal.com/img/userinfo.gif){kind=small} jeffr_tech) wrote, |
Yes, that's the tlb. It caches virtual to physical mappings for the processor. Most modern processors have multiple sizes of entries but the pages obviously have to be physically and virtually contiguous. There are very few TLBs relative to the size of memory so it's a highly contested resource. If you have a TLB miss it can turn into several cache misses as well as you walk the page tables to discover the real physical address.
